IBM has unveiled a new chip design that could pack 100 billion transistors onto a surface the size of a fingernail — a feat it says makes it the world's first known chip technology below 1 nanometre.
Current industry-standard chips measure around 2 nanometres, a billionth of a metre. IBM claims its new tech is the equivalent of roughly 0.7nm, achieved through a novel architecture it calls NanoStack. In tests, the prototype performed 50% better than its own 2nm chip and was 70% more energy efficient — similar leaps to those IBM reported when it debuted its 2nm chip back in 2021.
“IBM has created the world's first known chip tech below 1 nanometre, but it will be years before production.”
Jay Gambetta, director of IBM Research and an IBM Fellow, called it a “landmark moment” for the future of chips.
“With our new NanoStack architecture, we’re not just making smaller transistors, we’re reinventing how chips are built to deliver dramatically more power and energy efficiency,” he said.
Transistors are the building blocks of silicon chips that power everything from smartphones and games consoles to the data centres handling streaming, online banking and generative AI. The more transistors manufacturers can squeeze onto a chip, the more powerful it becomes, while designers also strive to make chips ever smaller.
For decades the number of transistors on a chip has doubled every two years — a trend known as Moore's Law. But with billions already packed in, sustaining that pace grows harder, and experts broadly agree it cannot continue indefinitely.
To extend the law, chip designers have for some time focused on 3D alternatives, making transistors taller rather than cramming them horizontally. IBM’s approach is to layer sheets of transistors on top of each other.
Professor Alan Woodward, a computer scientist at Surrey University, compared NanoStack to building a big block of flats instead of houses in a city. “IBM's NanoStack is like proposing a 100-storey skyscraper,” he said.
Despite the breakthrough, IBM said it will be several years before the chip technology is ready for production.